{
  "title": "Simple Resistor Model",
  "origin_url": "https://en.wikipedia.org/wiki/Verilog-AMS",
  "license_guess": null,
  "code_sha256": "0f0c41c1b429313a1e8e6df330a5d8b9740696811f5544165706fe8daddd6510",
  "added_at": "2026-02-12T10:37:57Z"
}
