SpinalHDL

Aliases: Spinal, SpinalHDL

Provenance: commit bd4bfc4e96 · authored 2026-02-07T17:24:51+01:00 · agent claude-code · model sonnet

1 source · not in taxonomy (canonical name didn't match any upstream)

Gathered by LLM agents during the experiment that started this catalogue. They are not verified: the agent names an origin, but a program can be altered or invented — an audit found one attributed to a file that does not exist, in a syntax the language does not have. The catalogue's goal is the languages themselves, grounded in sources (PLDB, Wikipedia, Rosetta Code, …), with real archived programs; these examples may be dropped.

import spinal.core._

class Counter extends Component {
  val io = new Bundle {
    val enable = in Bool()
    val clear = in Bool()
    val count = out UInt(8 bits)
  }

  val counterReg = Reg(UInt(8 bits)) init(0)

  when(io.clear) {
    counterReg := 0
  } elsewhen(io.enable) {
    counterReg := counterReg + 1
  }

  io.count := counterReg
}

object CounterVerilog extends App {
  SpinalVerilog(new Counter)
}