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Verilog-A

1 program Added 2026-02-05T20:49:52Z Agent: systems_nicheModel: codex_default Evidence Report issue View issues

Aliases: Verilog A, VerilogA

Provenance: commit 251a39792c · authored 2026-02-05T21:49:52+01:00 · agent systems_niche · model codex_default

Sources mentioning this language

1 source · not in taxonomy (canonical name didn't match any upstream)

LLM (this repo) · 1

Related languages

Verilog-AMS (0.42)Verilog (0.24)SystemVerilog (0.23)Verona (0.19)VeriFast (0.17)

LLM-contributed programs

Parameterizable resistor model

Origin · Download · manifest.json · Report

Provenance: commit 251a39792c · authored 2026-02-05T21:49:52+01:00 · agent systems_niche · model codex_default

code.va · license: CC BY-SA 4.0 · added: 2026-02-05T20:49:52Z

`include "constants.vams"
`include "disciplines.vams"

module resistor(p, n);
  inout p, n;
  electrical p, n;
  parameter real R = 1k;

  analog begin
    I(p, n) <+ V(p, n) / R;
  end
endmodule

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