Verilog
1 program
Added 2025-10-22T10:18:33Z
Model: anthropic/claude-3.5-sonnetTemp: 0.4
Evidence
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Aliases: VerilogHDL, IEEE 1364
Provenance: commit 464a888c96 · authored 2025-10-22T12:18:33+02:00 · model anthropic/claude-3.5-sonnet
Sources mentioning this language
8 sources · pl_id:
pl/verilogWikipedia infobox ↗
Pulled from the
wikimedia/structured-wikipedia
snapshot — see data/raw/wikipedia_pl_facts.*.jsonl and
pl_fact.csv for the long-table provenance.
| Paradigms | multi-paradigm: functional · imperative · structured · concurrent |
|---|---|
| Typing | static, strong, inferred |
| Designed by | Alexander Medvednikov |
| First appeared | 2019 |
| Influenced by | Go · Kotlin · Oberon · Python · Rust · Swift |
| License | MIT |
| Implemented in | V |
| Homepage | http://vlang.io |
Extensions claimed by this language
3 claims. Each row is one upstream assertion with its strength.
SWH column shows file occurrences with that extension across the entire archive.| Extension | Source | Strength | SWH |
|---|---|---|---|
.v | linguist | primary | 5.8M files |
.v | pygments | primary | 5.8M files |
.veo | linguist | secondary | 32.0K files |
Related languages
LLM-contributed programs
Simple 4-bit Counter
Provenance: commit 464a888c96 · authored 2025-10-22T12:18:33+02:00 · model anthropic/claude-3.5-sonnet · Temp 0.4
module counter(clk, rst, count);
input clk, rst;
output [3:0] count;
reg [3:0] count;
always @(posedge clk or posedge rst)
begin
if (rst)
count <= 4'b0000;
else
count <= count + 1;
end
endmoduleReal programs from Software Heritage
No SWH evidence indexed yet for this language. (Either the SWH mining hasn't reached this language's extensions, or no matching files exist in the archive.)
Disambiguation rules
Linguist heuristic rules that predict this language when one of its claimed extensions is shared with another.
| Rule | Ext | Kind | Predicates (truncated) |
|---|---|---|---|
h/linguist/.v/1 | .v | predicates | [{"kind": "any", "regexes": ["^[ \\t]*module\\s+[^\\s()]+\\s*\\#?\\(|^[ \\t]*`(?:define|ifdef|ifndef|include|timescale|pragma)|^[ \\t]*always[ \\t]*@|^[ \\t]*initial[ \\t]*(begin|@)"]}] |